PSA3920C-LF telecommunications satellite telemetry 5 40 3920 -70 -95 -15 2 1 -40 to 85 frequency range harmonic suppression (2nd, typ.) sideband spurs (typ.) switching speed (typ., adjacent channel) startup lock time (typ.) operating temperature range package style pll-24h mhz dbc dbc msec msec c vdc ma supply voltage (vcc, nom.) supply current (icc, typ.) all specifications are typical unless other wise noted and subject to change without notice. phase noise (1 hz bw, typical) ? z-communications, inc. all rights reserved page 1 phase locked loop features applications performance specifications value units power supply requirements application notes 3920 mhz ? step size: 20000 khz - style package pll-24h ? ? ? ? a1 rev ? an-107 : how to solder z-comm vcos / plls ? an-200 : mounting and grounding of z-comm plls ? an-201 : pll fundamentals an-202 : pll functional description notes: reference oscillator signal: 5 mhz< <100 mhz prescaler: 32 frequency synthesizer: analog devices - adf4106 9939 via pasar ? san diego, ca 92126 tel (858) 621-2700 fax (858) 621-2722 power output 32 dbm load impedance 50 step size 20000 khz 5000 3920 - ? frequency range: - 3920 charge pump output current phase noise @ 10 khz offset (1 hz bw, typ.) dbc/hz
3760 3770 3780 3790 3800 3810 3820 3830 3840 3850 3860 3870 3880 3890 3900 3910 3920 3930 3940 3950 3960 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 0 1 2 3 4 5 3779 3794 3810 3827 3845 3867 3889 3911 3931 3948 low cost - high performance phase locked loop ? z-communications, inc. page 2 printed in the u.s.a. PSA3920C-LF vco power curve, typ. page 2 physical dimensions 17 19 15 13 1 2 3 4 8 10 12 24 22 20 5 6 7 911 14 16 18 21 23 top p1 rf output p2-4 ground p5 reference oscillator input p6 ground p7 clock p8 data p9 ground p10 load enable p11 ground p12 lock detect p13 vcc p14 ground p15 ground p16 ground p17 no connection p18-24 ground tabs range: see note 5 (4 places) detail a .015 .030 .055 detail b (typ) (8 places) 1. the inside radius of all 24 half holes at the perimeter of the board are plated to provide a surface for the attachment of the pll module to the pcb. 16 pads are for grounding, 8 pads are for signal interface. 2. the surface of the shield is tin-plated and may be soldered to. the shield?s base metal is cold-rolled steel. 3. the ground plane on the bottom side is ground and attaches to a ground track on the top side of the board as well as to the shield. 4. unless otherwise noted all dimensions are in inches. 5. unless otherwise noted all tolerances are as follows: .xxx = .010. see detail a see detail b pin 1 bottom .000 .153 .238 .323 .408 .493 .578 .663 -.025 .841 .000 .115 .200 .285 .370 .455 .580 -.026 .605 .816 0.220 .032 side view c 25 vco tuning curve, typ. frequency (mhz) tuning voltage (vdc) c 25 c -40 c 85 frequency (mhz) output power (dbm)
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